Reports suggest that Google is collaborating with Marvell on the creation of two chips. One chip aims to enhance existing TPUs, while the other chip is designed for next-generation TPUs.
Google Might Join Forces With Marvell To Further Enhance the TPU Ecosystem For Next-Gen AI Models
According to The Information, discussions between Google and Marvell have begun regarding the development of two new chips for AI inference.
While the current stage of these discussions remains undisclosed, the proposal of two chips by Google signifies progress. One chip is intended to enhance TPUs by introducing a memory processing unit to work alongside them. This unit would help offload some memory requirements to a dedicated MPU.
The second chip discussed is a next-generation TPU optimized for AI inference models. Currently, Google’s leading AI accelerator is the TPU v7 (Ironwood series), offering impressive memory and performance capabilities.
Although ASICs are crucial for AI inferencing, challenges in the supply chain persist. Demand for Google’s TPUs is rising, but production limitations at semiconductor companies pose a hurdle.
Future Google TPUs, accompanied by MPUs, are expected to enhance the memory subsystem for improved AI model performance, especially in inferencing.
About the author: A Software Engineer by training and a PC enthusiast by passion, Hassan Mujtaba serves as Wccftech’s Senior Editor for hardware section. With years of experience in the industry, he specializes in deep-dive technical analysis of next-generation CPU and GPU architectures, motherboards, and cooling solutions. His work involves not only breaking news on upcoming technologies but also extensive hands-on reviews and benchmarking.
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